Finite State-Machine in Verilog - Using button toggle

This is a code sample for a finite state-machine using Verilog and was tested using the Mojo FPGA board.

The code turns on one of the 8 LED in the Mojo board at a time. The lit LED transitions using the on-board Reset button.


Code Sample:

module LED_state_machine(

    input   clk,     // 50MHz clock input
    input   nRst,    // input from reset button
    input   cclk,    // clock input from AVR microcontroller
    output  reg[7:0]led,   // output 8 onboard LEDs  
    
    // all connection below are for the microcontroller in Mojo

    output  spi_miso,          // SPI connections for AVR
    input   spi_ss,
    input   spi_mosi,
    input   spi_sck,
    output  [3:0] spi_channel, // AVR ADC channel select   
    input   avr_tx,            // AVR Tx => FPGA Rx
    output  avr_rx,            // AVR Rx => FPGA Tx
    input   avr_rx_busy        // AVR Rx buffer full
    );

// for Mojo only. these signals should be high-z when not used.

assign  spi_miso = 1'bz;
assign  avr_rx = 1'bz;
assign  spi_channel = 4'bzzzz;

reg       rst;     // create registers for button press and state

reg  [3:0]state=0;

always@(posedge clk)
 rst <= ~nRst;     // connects reset button to rst register

//beginning of state-machine
always@(posedge rst)  // state-machine will respond with rst press
begin
    case(state)
        3'd0: begin
                led[7:0]<=8'b0000_0001;  // only led[0] is hi
                state <= 3'd1;           // jump to state 3'd1
              end
        3'd1: begin
                led[7:0]<=8'b0000_0010;  
                state <= 3'd2;          
              end           
        3'd2: begin
                led[7:0]<=8'b0000_0100;
                state <= 3'd3;
              end
        3'd3: begin
                led[7:0]<=8'b0000_1000;
                state <= 3'd4;
              end
        3'd4: begin
                led[7:0]<=8'b0001_0000;
                state <= 3'd5;
              end
        3'd5: begin
                led[7:0]<=8'b0010_0000;
                state <= 3'd6;
              end
        3'd6: begin
                led[7:0]<=8'b0100_0000;
                state <= 3'd7;
              end
        3'd7: begin
                led[7:0]<=8'b1000_0000; // back to state 0
                state <= 3'd0;          
              end
     default: state <= 3'b0; 
    endcase
end
endmodule

   

Mojo v2 FPGA Development Board

A couple years ago, I funded a kickstarter for Embedded Micro's Mojo FPGA Development Board, which was promptly delivered a few months later. This development board features:


- Spartan-6 XC6SLX9 FPGA
- 84 digital I/O pins
- 8 analog inputs
- 8 general purpose LEDs
- 1 reset push button
- 1 LED for FPGA configuration status
- Input voltage regulator for 4.8V - 12V (recommended 5V)
- ATmega32U4 microcontroller to configure FPGA, USB interface, and read analog pins
- On-board flash memory for the FPGA configuration file

The microcontroller uses an Arduino compatible bootloader to allow code loading directly from USB or using the Arduino IDE. Embedded Micro also provides a java based code loader to upload .bin files directly to the Spartan-6 using USB, without a Xilinx programmer.

I found this small board pretty convenient for doing some simple FPGA designs. Plus, its ~$80.00 price make it very accessible to hobbyists compared to the majority of Altera or Xilinx based development boards in the market.

Instructions on how to purchase a board, and how to download and install the tool can be found in Embedded Micro's website.

I'll be using my Mojo v2 for most of my FPGA posts in this blog.