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Let's begin talking about digital logic. We use high and low voltage signals to represent a 1 and 0 binary system. The voltages are usually defined by some standard. For instance, TTL logic uses 0V and +5V for 0 and 1. Because of that, many people assume that electric signals in digital logic are exclusively high or low, like perfectly squared signals (see in figure 1).
Fig 1. Square wave representing digital 1's and 0's
Fig 2. Step response showing overshooting and oscillation
Digital devices use a threshold to decide if a signal becomes 0 or 1. However, when a rising signal is affected by noise or oscillation, it can end up crossing a thresholds multiple times (fig. 3). In the example, the input signal transitions from low to high. But, because of the noise, the signal ends up crossing the threshold multiple times and the circuit interprets it as a multiple transitions.
Fig 3. Digital signal with multiple transitions due to noise
So, what's hysteresis? It is a region around the threshold designed to ignore any transitions caused by a noisy signal or oscillations. In other words, it is a property that creates two separate thresholds for a digital signal (see fig. 4).
Additionally, if you don't pay attention to it, you could inadvertently create timing delays, and some unstable signals might could up crossing it.
Fig 4. Digital threshold showing hysteresis band
For an example, we can take a look at TTL logic (transistor-transistor logic). The output will usually transition to high, only when the input is between 2V to 5V. The gap between 0.8V and 2V would be our hysteresis and ff the signal oscillates, the output won't transition to low unless the input signal falls below 0.8V. .
Fig 5. TTL signal levels
